Release Notes¶

Change Log¶

There is now a “Rotation Alignment” wizard that automates the process of using the rotation stage to align the sample to the XY stage.
The dos window has been removed. All log messages are now written to the “Application Log Window”.
There is now a “Pix2Net.exe” file, instead of a “run.bat” file.
The polygon line drawing tool and the ruler tool are now set to orthogonal mode when the user holds down shift.
The ribbon buttons now display the shortcut keys in the tool tips.
Added the ability to schedule focus adjustments during a capture
In the Capture Config window, changed “Pixels Per Micron” to “Pixel Width”
Added a button for reversing an anchor group. Reversing an anchor group will swap the “movable” and “static” layers around.
Added the ability to straighten a layer using anchors, and a “Straightening Guide” to verify features are straight.
The 32-bit version of Pix2Net is no longer maintained or built.

The Feature Extraction window has been completely redesigned.
Added a “Filter Layer” command to the “Image” tab. This command applies image filters to a layer and saves the results.
Simplified the buttons in the ‘Capture’ tab: There is no longer a ‘Pause’ button, because the ‘Stop’ button can be used to pause the run. The ‘Capture Config’ dialog no longer has a ‘resume’ option. Instead, runs can be resumed by pressing the ‘Resume’ button in the ribbon.
The ‘New Project’ and ‘Open Project’ commands now show a progress bar.
Added a ‘Home’ button to the Manual Move panel.
During the capture process, if an error occurs while capturing an image, Pix2Net will now automatically retry three times.
Pix2Net now warns the user if tasks are still running when the user tries to close the Pix2Net window.
Fixed a bug that prevented color images from stitching correctly with the default stitch settings
Fixed a bug that prevented the commands in the stitch editor from working
Fixed: Starting a large capture (10,000+ tiles) was causing Pix2Net to freeze for 30 seconds or more before capturing the first tile; large runs now start after a couple of seconds.
Fixed: The ‘union (self)’ polygon operation was not combining all of the polygons that it could.
Fixed: The layer importer was converting color images to gray scale during the import process.
Fixed: The opacity slider was not functioning correctly in certain situations.

Netlisting large polygon layers is now much faster
Rendering large polygon layers is now much smoother
Added the Layout Matcher
Added the ability to set a custom origin
Auto-schematic now allows the user to view the schematic in transistor mode, gate mode, and interactive mode
Fixed a number of features that were temporarily broken after upgrading from H2 to PostgreSQL

The backend for projects has been changed from H2 to PostgreSQL.
Multiple netlists can now be created.
The netlists are now updated in real time as the user modifies cells and polygons.
Added the Path Tracer tool, which makes it easy to find VSS/VDD shorts.
Cell and polygon operations are now undoable.
The Find Transistors feature is now easier to use.
The auto cell identification feature now compares cells by using truth tables, instead of netlists.
Auto-schematic now draws transistor schematics.
The recovery system now allows projects to be restored to any point in time.

Cell Search: Cell instances are now placed more accurately.
Cell Search: Fixed the bug that prevented the user from searching for cells with children.
Netlist tab: Added a Check Netlist button.
Netlist: Added a Simulation button.
Cells tab: Added a Clone Primary Instances feature.
View tab: The Reports window can now be opened from this tab.
Golden Compare: Added the ability to exclude warnings.
Netlist exporting: Added the ability to determine which electrical properties to export.
Netlist exporting: Added the ability to export a flat Verilog or Spice netlist.
Netlist exporting: Fixed some minor bugs in the Spice exporting process.
Auto cell id: The diffusion and polysilicon layers are no longer modified.
Auto cell id: Different widths are now allowed for pmos and nmos transistors.
Auto cell id: Fixed bug that caused zero width transistors to be found.
The renderer has been improved, which makes moving around smoother.
Added helpful functions for toggling cell visibility in the Project Cells window.
Fixed the bug that prevented the subnets window from being updated when the selected cell instance changed.